Test MP+dmb.sy+data-[ws-rf]-ctrl-addr-pos

AArch64 MP+dmb.sy+data-[ws-rf]-ctrl-addr-pos
"DMB.SYdWW Rfe DpDatadW WsLeave RfBack DpCtrldR DpAddrdR PosRR Fre"
Cycle=Rfe DpDatadW WsLeave RfBack DpCtrldR DpAddrdR PosRR Fre DMB.SYdWW
Relax=
Safe=Rfe Fre PosRR DMB.SYdWW DpAddrdR DpDatadW DpCtrldR [WsLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpDatadW WsLeave RfBack DpCtrldR DpAddrdR PosRR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X6=a; 1:X9=x;
2:X1=z;
}
 P0          | P1                  | P2          ;
 MOV W0,#1   | LDR W0,[X1]         | MOV W0,#2   ;
 STR W0,[X1] | EOR W2,W0,W0        | STR W0,[X1] ;
 DMB SY      | ADD W2,W2,#1        |             ;
 MOV W2,#1   | STR W2,[X3]         |             ;
 STR W2,[X3] | LDR W4,[X3]         |             ;
             | CBNZ W4,LC00        |             ;
             | LC00:               |             ;
             | LDR W5,[X6]         |             ;
             | EOR W7,W5,W5        |             ;
             | LDR W8,[X9,W7,SXTW] |             ;
             | LDR W10,[X9]        |             ;
Observed
    z=2; y=1; x=1; 1:X8=1; 1:X4=1; 1:X10=0; 1:X0=1;
and z=1; y=1; x=1; 1:X8=1; 1:X4=1; 1:X10=0; 1:X0=1;
and z=2; y=1; x=1; 1:X8=1; 1:X4=2; 1:X10=0; 1:X0=0;
and z=2; y=1; x=1; 1:X8=1; 1:X4=1; 1:X10=0; 1:X0=0;
and z=1; y=1; x=1; 1:X8=1; 1:X4=1; 1:X10=0; 1:X0=0;